Table of Contents

1 The Method of Logical Effort2 Design Examples3 Deriving the Method of Logical Effort4 Calculating the Logical Effort of Gates5 Calibrating the Model6 Asymmetric Logic Gates7 Unequal Rising and Falling Delays8 Circuit Families9 Forks of Amplifiers10 Branches and Interconnect11 Wide Structures12 ConclusionsA Cast of CharactersB Reference process parametersC Logical Effort ToolsD Solutions

Promotional Information

* Explains the method and how to apply it in two practically focused chapters.
* Improves circuit design intuition by teaching simple ways to discern the consequences of topology and gate size decisions.
* Offers easy ways to choose the fastest circuit from among an array of potential circuit designs.
* Reduces the time spent on tweaking and simulations-so you can rapidly settle on a good design.
* Offers in-depth coverage of specialized areas of application for logical effort: skewed or unbalanced gates, other circuit families (including pseudo-NMOS and domino), wide structures such as decoders, and irregularly forking circuits.
* Presents a complete derivation of the method-so you see how and why it works.

About the Author

Ivan E. Sutherland, a vice president and fellow at Sun Microsystems, received the Turing Award and the Von Neumann Medal for his pioneering contributions in the fields of computer graphics and microelectronic design. Robert F. Sproull is an internationally noted expert on the design of graphics hardware and software. He too is a vice president and fellow at Sun. David Harris is the Harvey S. Mudd Professor of Engineering Design at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Broadcom, and other design companies. David holds more than a dozen patents and is the author of three other textbooks on chip design, as well as many Southern California hiking guidebooks. When he is not working, he enjoys hiking, flying, and making things with his three sons.